E-mail: editor@ijeetc.org; nancy.liu@ijeetc.org
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Prof. Pascal Lorenz
University of Haute Alsace, FranceIt is my honor to be the editor-in-chief of IJEETC. The journal publishes good papers which focus on the advanced researches in the field of electrical and electronic engineering & telecommunications.
2026-01-02
2025-11-10
2025-10-24
2025-09-15
Abstract—This paper presents a design of low cost and high throughput multistandard transform (MST) core using combination of Factor Sharing and Distributed Arithmetic called Common Sharing Distributed Arithmetic (CSDA) method. CSDA technique reduces the number of adders efficiently compared to the direct implementation by 44.5%.This architecture shares the available hardware resources, so the hardware cost gets reduced. With eight parallel computation paths, the proposed MST core has an eightfold operation frequency throughput rate. CSDA-MST core achieves a high-throughput rate, supporting the (4928 × 2048@24 Hz) digital cinema or ultrahigh resolution format. It supports MPEG-1/2/4 (8 × 8), H.264 (8 × 8, 4 × 4), and VC-1 (8 × 8, 8 × 4, 4 × 8, 4 × 4) transforms. Reduction of gate counts from 28,606 to 23,799 can be achieved here. Index Terms—Common Sharing Distributed Arithmetic (CSDA), Discrete Cosine Transform (DCT), Integer transform, Multistandard transform (MST)
Cite: A Bharathi, M Jayabharathi, S Keerthana and P Nivetha, "DESIGN OF MULTISTANDARD TRANSFORM CORE USING COMMON SHARING DISTRIBUTED ARITHMETIC," International Journal of Electrical and Electronic Engineering & Telecommunications, Vol. 1, No. 1, pp. 49-54, March 2015.